PhD Student in Computer Engineering at University of Toronto
Industry & Research Experience
Intel Corporation (now Altera) Software Engineer
May 2020 - May 2021
Enhanced production LLVM-based High-Level Synthesis (HLS) compiler toolchains (oneAPI, OpenCL,HLS compiler) for Intel FPGAs, improving performance and robustness for internal and external users
Shipped compiler features and analysis passes that supported scalable compilation of complex FPGA work-loads across multiple device families
Executed weekly Quality-of-Results (QoR) analysis, diagnosing performance and resource regressions acrosscompiler versions and architectures to ensure production readiness
Collaborated with globally distributed teams to assess architectural changes and clearly communicate perfor-mance, reliability, and usability trade-offs to stakeholders and customers
Tsinghua University Research Intern
May 2021 - April 2022
Institute for Network Sciences and Cyberspace | Supervisor: Prof. Qi Li
Designed a novel intellectual property protection mechanism for deep neural networks (DNNs), targeting robustness against model extraction and unauthorized reuse
Characterized attacker behaviors and identified security limitations in existing DNN protection techniques through empirical analysis
Conducted systematic, large-scale empirical evaluations across diverse adversarial threat models to assess defense effectiveness
University of Toronto Summer Research Intern
May 2019 - August 2019
Programmable Digital Systems Group | Supervisor: Prof. Jason H. Anderson
Enhanced the LegUp High-Level Synthesis framework to exploit register-rich FPGA architectures, enabling deeper pipelines and higher performance designs
Implemented LLVM backend extensions that improved pipeline depth and performance of synthesized FPGA circuits